Non-dissipative rail drivers for adiabatic circuits
نویسندگان
چکیده
Energy dissipation of CMOS circuits is becoming a major concern in the design of digital systems. Earlier, we presented a new form of CMOS charge recovery logic (SCRL), with an energy dissipation per operation that falls linearly with operating frequency, as opposed to the constant energy required for conventional CMOS circuits 1]. These SCRL circuits, along with most adiabatic circuit techniques proposed to date, require a set of gradually swinging power supply rails that in eeect force all charge transfers within the system to occur quasistatically. Proposals to date for generating these swinging rails have relied on a power MOSFET to gate the oscillation of an inductor, forming an RLC circuit. Even under ideal conditions, dissipation in this MOSFET degraded the overall energy savings of SCRL circuits from 1=T dependence to 1= p T. SCRL and other adiabatic circuits thus exhibited inferior overall energy saving performance when compared supply voltage scaling of conventional CMOS circuits. In this paper, we present a technique for generating the required rail waveforms without the series power MOSFET to gate the inductor. This new rail driver circuit relies on adding multiple harmonics of the base frequency to generate a rail waveform of any desired shape. Our Harmonic Rail Driver (HRD) can be built using only passive reactive components or by using correctly trimmed transmission line segments. It is non-dissipative to within the achievable Q's of these components. Using HRDs to power and control SCRL circuits, we restore the overall dissipation of SCRL circuits to its attractive 1=T dependence. In addition, adding harmonics allows us to construct a rail voltage that very closely approximates a linear voltage ramp instead of the sinusoidal waveform generated by previous techniques, improving the constant factor in the energy expression from 2 =8 to 1. This change markedly improves the performance of SCRL circuits, making their energy saving performance comparable to what is obtained by scaling the supply voltage in conventional CMOS when V TH is held constant, for all operating frequencies. Alternatively, with HRDs, we can push the energy-speed tradeoo in the direction of higher performance, since it becomes possible to overdrive a CMOS system beyond its maximum dc operating frequency for a given supply voltage, so long as the devices do not reach saturation, trading higher energy consumption for increased performance. The usefulness of HRDs extends beyond driving adiabatic circuits, to other applications such as driving the periodic control …
منابع مشابه
Design and Performance Analysis Of Ultra Low Power 6T SRAM Using Adiabatic Technique
ABSTRACT: Power consumption has become a critical concern in both high performance and portable applications. Methods for power reduction based on the application of adiabatic techniques to CMOS circuits have recently come under renewed investigation. In thermodynamics, an adiabatic energy transfer through a dissipative medium is one in which losses are made arbitrarily small by causing the tra...
متن کاملSymmetric Adiabatic Logic Circuits against Differential Power Analysis
© 2010 ETRI Journal, Volume 32, Number 1, February 2010 We investigate the possibility of using adiabatic logic as a countermeasure against differential power analysis (DPA) style attacks to make use of its energy efficiency. Like other dual-rail logics, adiabatic logic exhibits a current dependence on input data, which makes the system vulnerable to DPA. To resolve this issue, we propose a sym...
متن کاملOn The Design of Adiabatic SRAMs
In the design of low-power circuits, adiabatic logic shows great promise. However, research till date have concentrated on adiabatic logic circuits/families. Today's VLSlsystems integrate random logic, megamodules and memories. Hence, the success of adiabatic circuits will depend on the efficient implementation of not only random logic, but also the other components of a VLSI system. In this pa...
متن کاملWeakly dissipative systems in Celestial Mechanics
We investigate the dynamics associated to nearly–integrable dissipative systems, with particular reference to some models of Celestial Mechanics which can be described in a weakly dissipative framework. We start by studying some paradigmatic models provided by the dissipative standard maps in 2 and 4 dimensions. The dynamical investigation is performed applying frequency analysis and computing ...
متن کاملSTAN AND BURLESON : LOW - POWER DRIVERS 151 GND Vin Vout C = 1 nF Vdd / 2 Vdd Vdd INn
| The clock tree of modern synchronous VLSI circuits can consume as much as 50% of their entire power budget. Diierent methods of decreasing clock power dis-sipation have been proposed based on low-voltage swings, double-edge triggered ip-ops, gated clocks, etc. In this paper we propose two types of full-swing low-power CMOS clock drivers. Both are based on a stepped charging and discharging of...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 1995